Probe cards are commonly used in the testing of integrated circuit devices, including memory chips. Certain conventional probe cards have, on one side, an array of metal probes that are arranged to make contact with external electrical contacts, usually in the form of pads or bumps, on the semiconductor device under test. The arrangement of the probes is dictated by the arrangement of the pads or bumps on the device. The probes are typically mounted within a probe head. The opposite ends of the probes may be connected to, for example, a space transformer. One form of space transformer is a multi-layer ceramic structure, in which conductive paths from the probes are routed through and between the layers, emerging on the back side of the space transformer as contact pads that are more widely spaced apart than the probes. Contacts pads may then be connected by telescopic “pogo pins” to a printed circuit board (PCB) that has traces that can be connected to a test circuit. The PCB may also be a multi-layer structure within which the spacing of the electrical paths is further increased.
Within the probe card or probe card assembly there are, thus, a large number of electrical paths located close together and with shapes that are, to a considerable extent, dictated by the problem of physically connecting the paths to the pads on the semiconductor device under test. As a result, significant inductances can arise within and between the electrical paths. These inductances can result in the effective power supply voltage (VCC−VGND) being appreciably less at the probes than it is on the PCB. If the discrepancy (VDROOP) exceeds a certain level (e.g., more than 20%), it can interfere with the testing of the semiconductor devices.
One solution to reducing the effect of the inductances is to decouple the power delivery. This may be done, for example, by placing decoupling capacitors between the power leads on the PCB and on the back side of the space transformer. This is illustrated in FIGS. 1 and 2. Typically, locating decoupling capacitors on the probe side of the space transformer has not been practical due to the close spacing of the probes, and since it is desirable to permit free and uniform movement of the probes as the probe card engages the semiconductor device under test.
Further, conventional approaches using decoupling capacitors typically do not adequately account for inductance problems related to the exposed conductors downstream of the decoupling capacitors (e.g., the conductors in the space transformer, the conductive probes themselves extending from a probe head, etc.). Thus, it would be desirable to provide an improved apparatus and method for reducing undesirable inductance in connection with a probe card assembly.